The present invention relates to a rectifier circuit for the analog signal.
In manufacturing MOS integrated circuits, it is technically difficult to manufacture rectifying circuits. Japanese Patent Application No. 57-165364 discloses a solution to this problem, although it is unsatisfactory. This application will be given referring to FIG. 1. As shown, a MOS transistor Q1 as a first switch element is connected between an input terminal 12 of the rectifier circuit and the inverting input terminal of an operational amplifier 23. An inverter NOT1 (level detector) and another inverter NOT2 are connected in series between the input terminal 12 and the gate electrode of the transistor Q1. An operational amplifier 24 is connected at the inverting input terminal to the input terminal 12 through a resistor R5. The operational amplifier 24 is further connected at the noninverting input terminal to a reference potential generator 10 made up of transistors Q2 and Q3. These transistors Q2 and Q3 are connected in series between a power source VDD and ground. The potential at the output terminal of the operational amplifier 24 is fed back to the inverting input terminal through a resistor R6. A MOS transistor Q4 as a second switching element is connected between a junction point between the transistor Q1 and a resistor R3, and the output of the operational amplifier 24. The transistor Q4 thus connected is controlled by the output signal of the inverter NOT1. The output terminal of the reference potential generator 10 is connected to the noninverting input terminal of the operational amplifier 23. The output potential of the amplifier 23 is fed back to the inverting input terminal through a resistor R4. The output terminal of the amplifier 23 is connected to the output terminal of the whole circuit.
In the rectifier circuit thus arranged, when the AC input signal IN is higher in level than the threshold voltage of the inverter NOT1, the output signal of the inverter NOT1 is "L" in logical level, and the output signal of the inverter NOT2 is "H" in logical level. Therefore, the transistor Q1 is in the on-state and the transistor Q4 is in the off-state. The input signal IN passes through the transistor Q1, and is amplified by the operational amplifier 23, and transmitted to the output terminal 13 of the rectifier circuit. When the level of the AC input signal falls below the threshold voltage of the inverter NOT1, the transistor Q1 is in the off-state and the transistor Q4 is in the on-state. The operational amplifier 24, together with the resistors R5 and R6, forms an inverting amplifier. If the resistors R3 and R4 are selected to be equal in resistance, the operational amplifier 24 produces a signal inverted in polarity with respect to a reference potential. The inverted signal is passed through the transistor Q4, and further amplified by the operational amplifier 23, and transmitted to the output terminal 13. The output signal OUT from the output terminal 13 is the full-wave rectified signal of the AC input signal IN.
For the full-wave rectification by the above circuit, the amplification of the operational amplifier 24 is ideally 0 dB (gain 1). If not zero dB, the waveform of the output signal OUT is not exactly the rectified one. The factor to determine the amplification of the operational amplifier 24 is a ratio of the input resistance and the output resistance, R6/R5. To obtain the gain=1, the resistors R5 and R6 must be equal to each other, R5=R6. Actually, however, it is very difficult to manufacture these resistors so they have equal resistances. If the resistors are manufactured by the integrated circuit technology, a variation in the resistance of these resistors R5 and R6 is not small. To obtain a rectified wave with a satisfactorily large amplitude, at least two differential amplifiers are required. To form an operational amplifier with the 0-dB amplification, it is required to set the input resistor R5 and the feedback resistor R6 at relatively large resistances. From the standpoint of the IC technology, this is undesirable, because a larger chip area is required for the circuit integration.